Revolutionary Power-Saving: Next-Gen AI Chip Mimics Human Brain

Revolutionize computing with Professor Amrouch’s AI chip breakthrough! Double the power, mimic the human brain, and achieve 885 TOPS/W efficiency.

In a groundbreaking development, Professor Hussam Amrouch from the Technical University of Munich (TUM) has spearheaded the creation of an AI-ready architecture that surpasses traditional in-memory computing.

Amrouch’s discovery, which appeared in the reputed journal Nature, inspires ferroelectric field effect transistors (FeFETs) to offer a fresh perspective on computing. With possible uses in deep learning algorithms, robotics, and generative AI, this architectural change has the potential to double the power of AI chips.

Next-Generation AI Chip Simulates Human Brain for Power Savings

Unlike conventional chips where transistors solely perform calculations, the ingenious use of FeFETs transforms them into both computation and data storage units. This dual functionality not only saves time but also significantly enhances energy efficiency, consequently boosting overall chip performance.

“As a result, the performance of the AI chip is also boosted,” affirms Professor Hussam Amrouch, a leading authority in AI processor design.

The latest AI chips have millions of smoothly integrated 28-nanometer transistors that work as data storage and computation engines. The imperative for future chips lies in their speed and efficiency, necessitating the prevention of rapid overheating.

This becomes crucial for real-time applications like drone flight calculations.

“Tasks like this are extremely complex and energy-hungry for a computer,” elucidates Professor Amrouch.

The success of modern chips is quantified by the parameter TOPS/W, representing “tera-operations per second per watt.” This metric essentially measures the chip’s efficiency in performing a trillion operations (TOP) per second with one watt of power.

Bosch, Fraunhofer IMPS, and GlobalFoundries worked together to create an AI chip that achieved an astounding 885 TOPS/W, which is double the power of its competitors.

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Chip Architecture Inspired by the Human Brain:

Drawing inspiration from the human brain, the researchers incorporated a chip architecture that mimics the brain’s neurons and synapses. The use of “ferroelectric” (FeFET) transistors, acting as electronic switches with unique characteristics, facilitates information storage even without a power source. This unique method guarantees that data processing and storage occur at once inside the transistors.

“Now we can build highly efficient chipsets for deep learning, generative AI, or robotics, where data have to be processed at the source,” envisions Professor Amrouch.

The Road to Market-Ready Chips:

While the goal is to implement the AI chip in running deep learning algorithms, recognizing objects in space, and processing drone data in real-time, practical applications are still a few years away. 

Professor Amrouch anticipates it will take three to five years, at the earliest, for the first in-memory chips suitable for real-world applications to become available. Stringent security requirements and industry-specific criteria pose challenges that demand interdisciplinary collaboration.

“This emphasizes the importance of interdisciplinary collaboration with researchers from various disciplines,” emphasizes Professor Amrouch. He highlights the unique strength of the integrated Munich Institute of Robotics and Machine Intelligence (MIRMI) at TUM.


Q1: What makes the new AI chip architecture developed by Professor Hussam Amrouch unique?

The innovative AI chip architecture utilizes FeFETs, transforming transistors into both computation and data storage units, enhancing efficiency and performance.

Q2: When can we expect the first in-memory chips suitable for real-world applications to be available?

Professor Amrouch anticipates that it will take three to five years, at the soonest, before the first in-memory chips suitable for real-world applications become available, citing industry-specific criteria and security requirements as key factors.

Q3: How does the efficiency of AI chips measure up in the modern computing landscape?

Efficiency is quantified by the parameter TOPS/W, representing tera-operations per second per watt. The collaborative effort has resulted in an AI chip achieving an impressive 885 TOPS/W.

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Aliha Zulfiqar
Aliha Zulfiqar
With a major in English Language and Literature, I'm a dedicated SEO Content Writer. Also, I love to write about technology. With over 2 years of experience, I've had the privilege of contributing to various renowned platforms. As I look forward to the future, I am committed to refining my work and delivering content that stands out.

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